Recent Selected Journal Papers (2016-current)
Traverso, G., Sheehan, P., Bahai, A., Langer, R., Chandrakasan A. The potential of miniaturized ingestible electronics. Nat Electronics 9, 5–7 (Jan 2026) [Link]
M. Ashok,Y. Hu, H. Wang, E.G. Arnault, H.Raniwala, A.G. Amer, M. Trusheim, D.R. Englund, A.P. Chandrakasan, “Heterogeneously Integrated Nitrogen-Vacancy Sensing for Real-Time CMOS Security Threat Detection,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems (Nov. 2025) [Link]
D. Han, A. P. Chandrakasan, “MEGA.mini: An Energy-Efficient NPU Leveraging a Novel Big/Little Core With Hybrid Input Activation for Generative AI Acceleration,” in IEEE Journal of Solid-State Circuits (November 2025) [Link]
Z. Song, U. Guler, A. Chandrakasan,” A 23-µJ-per-frame Fully-Integrated U-Net-Based TinyML Processor for Real-Time and Autonomous Medical Image Segmentation”, BIOCAS 2025 (Oct 2025)
S. Shin, J. Jung, G. Traverso and A. P. Chandrakasan, “A 33.7% Tx Efficiency Crystal-Less BLE-Compatible Transmitter with Adaptive PA Output Power Calibration for Ingestible Devices,” 2025 IEEE European Solid-State Electronics Research Conference (ESSERC)(Sep 2025) [Link]
D. V. Kochar, M. Ashok, J. Cohn, X. Zhang and A. P. Chandrakasan, “Efficient Circuit Performance Prediction Using Machine Learning: From Schematic to Layout and Silicon Measurement With Minimal Data Input,” in IEEE Transactions on Circuits and Systems I: Regular Papers (Aug 2025) [Link]
Manohara M., Schoen SJ., Umut Yildirim D., Garcha P, Samir A., Bahai A., Chandrakasan AP., “An Analog Front-End for Bladder Ultrasound Monitoring: Achieving 75% Reduction in RX Power Consumption through Power Gating for Intra-Image Sparsity”, Annu Int Conf IEEE Eng Med Biol Soc. (Jul 2025) [Link]
Jang S, Lee HS, Agrawal RS, et al. Post Quantum Secure Communication Protocol with Ultra Low-Power Hardware Solution for Ingestible Medical Device. Annual International Conference of the IEEE Engineering in Medicine and Biology Society. IEEE Engineering in Medicine and Biology Society. Annual International Conference (Jul 2025) [Link]
M. Jia, J. Wang, J. Jung, X. Chen, E. Lee, A.P. Chandrakasan, R. Han, “A Fully Integrated 263-GHz Retro-Backscatter Circuit with 105°/82° Reading Angle and 12-dB Conversion Loss”, 2025 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)(June 2025) [Link]
D.V. Kochar, H. Wang, A.P. Chandrakasan, X. Zhang, “LEDRO: LLM-Enhanced Design Space Reduction and Optimization for Analog Circuits”, 2025 IEEE International Conference on LLM-Aided Design (ICLAD)(June 2025) [Link]
J. Jung, E. Lee, D. Han, J. Wang, A. P. Chandrakasan, and R. Han, “A 55.8-to-64.2GHz, 58.3fsrms-Jitter, -250.2dB-FoMJ Fractional-N Cascaded PLL in 28nm CMOS,” 2025 IEEE Symposium on VLSI Technology and Circuits (VLSI), Kyoto, Japan, (June 2025).
M. Ashok, R. Chen, T. Jeong, A. P. Chandrakasan and H. -S. Lee, “Protecting the Mixed-Signal Domain: Secure ADCs for Internet of Things Devices,” in Proceedings of the IEEE, vol. 113, no. 6, pp. 586-604, (June 2025) [Link]
SY. Yang, DU. Yildirim, S. Sharma, D. Han, R. Mittal, H. Ellis, J. Jung, E. Lee, Y. Cai, G. Traverso, AP. Chandrakasan, “A Fully-Integrated Wireless Ingestible Drug Delivery Chip with Electrochemical Energy Harvesting and pH-Based MPPT,” 2025 IEEE Custom Integrated Circuits Conference (CICC), Boston, MA, (Apr 2025) [Link]
D. Han and A. P. Chandrakasan, “MEGA.mini: A Universal Generative AI Processor with a New Big/Little Core Architecture for NPU,” 2025 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA (February 2025) [Link]
M. Ashok, S. Maji, X. Zhang, J. Cohn and A. P. Chandrakasan, “Digital In-Memory Compute for Machine Learning Applications With Input and Model Security,” in IEEE Journal of Solid-State Circuits (February 2025) [Link]
K. Lee, M. Ashok,“Secure Machine Learning Hardware: Challenges and Progress [Feature],” in IEEE Circuits and Systems Magazine (February 2025) [Link]
Z. Ji, H. Wang, M. Wang, W. Khwa, M. Chang, S. Han, A.P. Chandrakasan, “A Fully-Integrated Energy-Scalable Transformer Accelerator for Language Understanding on Edge Devices,” in IEEE Open Journal of the Solid-State Circuits Society (January 2025) [Link]
D. U. Yildirim et al., “A 0.7 cm 2 , 3.5 GHz, − 31 dBm Sensitivity Battery-Free 5G Energy-Harvester Backscatterer With 20 s Cold-Start Wake-Up Time for IoT-Enabled Warehouses,” in IEEE Journal of Solid-State Circuits (November 2024) [Link]
H. Huang, P. R. Chai, S. Lee, T. Kerssemakers, A. Imani, J. Chen, M. Heim, J. Y. Bo, A. Wentworth, F. T. Sanoudos-Dramaliotis, I. Ballinger, S. Maji, M. Murphy, A. Alexiev, G. H. Kang, N. Fabian, J. Jenkins, A. Pettinari, K. Ishida, J. Li, S. S. You, A.M Hayward, A. Chandrakasan, G. Traverso, “An implantable system for opioid safety”, Device. (Aug 2024) [Link]
Sahasrabudhe, A.,Rupprecht, L.E., Orguc, S., Khudiyev, T., Tanaka, T., Sands, J., Zhu, W., Tabet, A., Manthey, M., Allen, H., Loke, G.,Antonini, M.J., Rosenfeld, D., Park, J., Garwood, I.C., Yan, W., Niroui, F., Fink, Y., Chandrakasan, A.,Bohrquez, D.V., Anikeeva, P., “Multifunctional microelectronic fibers enable wireless modulation of gut and brain neural circuits”. Nature Biotechnology. (June 2024) [Link]
S. Maji, K. Lee and A. P. Chandrakasan, “SparseLeakyNets: Classification Prediction Attack Over Sparsity-Aware Embedded Neural Networks Using Timing Side-Channel Information,” in IEEE Computer Architecture Letters. (June 2024) [Link]
You, S.S., Gierlach, A., Schmidt, P., Selsing, G., Moon, I., Ishida, K., Jenkins, J., Madani, W. A.M., Yang, S., Huang, H., Owyang, S., Haywards, A., Chandrakasan, A., Traverso, G., “An ingestible device for gastric electrophysiology”. Nature Electronics, May 2024 [Link]
S. Maji, K. Lee, C. Gongye, Y. Fei and A. P. Chandrakasan, “An Energy-Efficient Neural Network Accelerator With Improved Resilience Against Fault Attacks,” in IEEE Journal of Solid-State Circuits, Mar 2024. [Link]
Jiadi Zhu, Ji-Hoon Park, Steven A. Vitale, Wenjun Ge, Gang Seob Jung, Jiangtao Wang, Mohamed Mohamed, Tianyi Zhang, Maitreyi Ashok, Mantian Xue, Xudong Zheng, Zhien Wang, Jonas Hansryd, Anantha P. Chandrakasan, Jing Kong, Tomás Palacios, “Low-thermal-budget synthesis of monolayer molybdenum disulfide for silicon back-end-of-line integration on a 200 mm platform”, Nature Nanotechnology, 1-8 (27th April 2023) [link]
Sun H., S. Maji, A. P. Chandrakasan, B. Marelli, “Integrating Biopolymer Design with Physical Unclonable Functions for Anticounterfeiting and Product Traceability in Agriculture,” Science Advances, Mar. 2023. [link]
Agrawal R., L. de Castro, G. Yang, C. Juvekar, R. Yazicigil, A. Chandrakasan, V. Vaikuntanathan, A. Joshi, “FAB: An FPGA-based Accelerator for Bootstrappable Fully Homomorphic Encryption,” 29th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2023. [link]
Abdelhamid M. R., U. Ha, Utsav B., F. Adib, A. P. Chandrakasan, “Batteryless, Wireless, and Secure SoC for Implantable Strain Sensing,” IEEE Open Journal of the Solid-State Circuits Society, Dec. 2022. [link]
Maji S., U. Benerjee, S. H. Fuller, A. P. Chandrakasan, “A Threshold-Implementation-Based Neural-Network Accelerator Securing Model Parameters and Inputs Against Power Side-Channel Attacks,” IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2022. [link]
Maji S., U. Banerjee, S. H. Fuller, R. T. Yazicigil, A. P. Chandrakasan, “Securing Embedded Medical Devices using Dual-Factor Authentication,” IEEE International Symposium on Computer-Based Medical Systems (CBMS), Jun. 2021. [link]
Banerjee U., A. P. Chandrakasan, “A Low-Power Elliptic Curve Pairing Crypto-Processor for Secure Embedded Blockchain and Functional Encryption,” IEEE Custom Integrated Circuits Conference (CICC), Apr. 2021. [link]
Maji S., U. Banerjee, A. P. Chandrakasan, “Leaky Nets: Recovering Embedded Neural Network Models and Inputs through Simple Power and Timing Side-Channels – Attacks and Defenses,” IEEE Internet of Things Journal, Feb. 2021. [link]
Jeong T., A. P. Chandrakasan, H. S. Lee, “S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance,” CICC 2020. [link]
Maji S., U. Banerjee, S. H. Fuller, M. R. Abdelhamid, P. M. Nadeau, R. T. Yazicigil, A. P. Chandrakasan, “A Low-Power Dual-Factor Authentication Unit for Secure Implantable Devices,” CICC 2020. [link]
Ibrahim M. I., M. I. W. Khan, C. S. Juvekar, W. Jung, R. T. Yazicigil, A. P. Chandrakasan, R. Han, “THzID: A 1.6mm2 Package-Less Cryptographic Identification Tag with Backscattering and Beam-Steering at 260GHz,” ISSCC 2020. [link]
Hills G., C. Lau, A. Wright, S. Fuller, M. D. Bishop, T. Srimani, P. Kanhaiya, R. Ho, A. Amer, Y. Stein, D. Murphy, Arvind, A. P. Chandrakasan, M. M. Shulaker, “Modern microprocessor built from complementary carbon nanotube transistors,” Nature, vol. 572, no. 7771, pp.595-602, Aug. 2019. [link]
Banerjee U., T. S. Ukyab, A. P. Chandrakasan, “Sapphire: A Configurable Crypto-Processor for Post-Quantum Lattice-based Protocols,” IACR Transactions on Cryptographic Hardware and Embedded Systems, vol. 2019, no. 4, pp. 17-61, Aug. 2019. [link]
Biswas A., A. P. Chandrakasan, “CONV-SRAM: An Energy-Efficient SRAM With In-Memory Dot-Product Computation for Low-Power Convolutional Neural Networks,” IEEE Journal of Solid-State Circuits, vol. 54, no. 1, pp.217-230, Jan. 2019. [link]
Juvekar C., V. Vaikuntanathan, A. P. Chandrakasan, “GAZELLE: A Low Latency Framework for Secure Neural Network Inference,” USENIX Security Symposium, August 2018. [link]
Tikekar M., V. Sze, A. P. Chandrakasan, “A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices,” IEEE Journal of Solid-State Circuits, vol. 53, no. 8, pp.2368-2377, Aug. 2018. [link]
Mimee M., P. Nadeau, A. Hayward, S. Carim, S. Flanagan, L. Jerger, J. Collins, S. McDonnell, R. Swartwout, R. J. Citorik, V. Bulovic, R. Langer, G. Traverso, A. P. Chandrakasan, T. K. Lu, “An ingestible bacterial-electronic system to monitor gastrointestinal health,” Science, vol. 360, no. 6391, pp.915-918, May 2018. [link]
Price M., J. Glass, A. P. Chandrakasan, “A Low-Power Speech Recognizer and Voice Activity Detector Using Deep Neural Networks,” IEEE Journal of Solid-State Circuits, vol. 53, no. 1, pp.66-75, Jan. 2018. [link]
Paidimarri A., A. P. Chandrakasan, “A Wide Dynamic Range Buck Converter With Sub-nW Quiescent Power,” IEEE Journal of Solid-State Circuits, vol. 52, no. 12, pp.3119-3131, Dec. 2017 [link].
El-Damak, D., A. P. Chandrakasan, “A 10 nW-1μW Power Management IC With Integrated Battery Management and Self-Startup for Energy Harvesting Applications,” IEEE Journal of Solid-State Circuits, vol. 51, no. 4. pp.943-954, April 2016. [link]