6.UAR Preparation for Undergraduate Research
[website]
Undergrad (Fall, Spring)
Prereq: 6.UR
Involves choosing and developing a research topic, surveying previous work and publications, research topics in EECS, industry best practices, design for robustness, technical presentation, authorship and collaboration, and ethics. Registered students must submit an approved proposal for an Advanced Research Project before Add Date. Forms and instructions are available in the EECS Undergraduate Office. May be repeated for credit for a maximum of 12 units.
A. P. Chandrakasan, D. M. Freeman
- Course 6 develops new “Super” UROPs
- EECS celebrates launch of SuperUROP
- SuperUROP propels undergraduate research to next level
- First ‘SuperUROPs’ cap off inaugural year
- MIT’s EECS department embraces student leadership
- SuperUROP raises bar for undergraduate research and innovation
- Industry finds ‘top-notch engineering students’ in SuperUROP
6.111 Introductory Digital Systems Laboratory
[Spring 2007] [OpenCourseWare]
Undergrad (Fall, Spring) Institute Lab
Prereq: 6.002 or 6.071
Lectures and labs on digital logic, sequential building blocks, finite-state machines, timing and synchronization, and FPGA-based design prepare students for the design and implementation of a final project of their choice: games, music, digital filters, wireless communications, video, or graphics. Extensive use of Verilog for describing and implementing digital logic designs on a state-of-the-art FPGA. Students engage in extensive written and oral communication exercises. 12 Engineering Design Points.
A.P. Chandrakasan
6.374 Analysis and Design of Digital Integrated Circuits
[Fall 2007]
Graduate (Fall) H-Level Grad Credit
Prereq: 6.012, 6.004
Device and circuit level optimization of digital building blocks. MOS device models including Deep Sub-Micron effects. Circuit design styles for logic, arithmetic and sequential blocks. Estimation and minimization of energy consumption. Interconnect models and parasitics; device sizing and logical effort; timing issues (clock skew and jitter) and active clock distribution techniques. Memory architectures, circuits (sense amplifiers) and devices. Testing of integrated circuits. Extensive use of circuit layout and SPICE in design projects and software labs. 4 Engineering Design Points.
A. P. Chandrakasan